The TPS51100DGQ is a 3A Source/Sink DDR Terminator Regulator specifically designed for low-external component count systems where space is a premium. The TPS51100 maintains fast transient response, only requiring 20µF (2 x 10µF) of ceramic output capacitance. It supports remote sensing functions and all features required to power the DDR and DDR2 VTT bus termination according to the JEDEC specification. The part also supports DDR3 VTT termination with VDDQ at 1.5V (typical). In addition, the TPS51100 includes integrated sleep-state controls, placing VTT in Hi-Z in S3 (suspend to RAM) and soft-off for VTT and VTTREF in S5 (suspend to disk). The soft-start function of the VTT is achieved via a current clamp, allowing the output capacitors to be charged with low and constant current that gives linear ramp-up of the output voltage. The current-limit threshold is changed in two stages using an internal PowerGood signal.
● VLDOIN voltage range (1.2 to 3.6V)
● 3A Sink/Source termination regulator includes droop compensation
● Requires only 20µF ceramic output capacitance
● Supports Hi-Z in S3 and soft-off in S5
● 1.2V Input (VLDOIN) helps reduce total power dissipation
● integrated divider tracks 0.5VDDQSNS for VTT and VTTREF
● Remote sensing (VTTSNS)
● ±20mV Accuracy for VTT and VTTREF
● 10mA Buffered reference (VTTREF)
● Built-in soft-start, UVLO and OCL
● Thermal shutdown
● Green product and no Sb/Br
●This device has limited built-in ESD protection, leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
