TPIC6B259N Datasheet PDF - TI

The TPIC6B259N is a 8-bit Addressable Latch controls open-drain DMOS-transistor outputs and is designed for general-purpose storage applications in digital systems. Specific uses include working registers, serial-holding registers and decoders or demultiplexers. This is a multi- functional device capable of storing single-line data in eight addressable latches and 3-to-8 decoder or demultiplexer with active-low DMOS outputs. Four distinct modes of operation are selectable by controlling the clear (CLR\\) and enable (G\\) inputs as enumerated in the function table. In the addressable-latch mode, data at the data-in (D) terminal is written into the addressed latch. The addressed DMOS-transistor output inverts the data input with all unaddressed DMOS-transistor outputs remaining in their previous states. In the memory mode, all DMOS-transistor outputs remain in their previous states and are unaffected by the data or address inputs.

● Avalanche energy 30mJ

● Eight power DMOS-transistor outputs of 150mA continuous current

● 50V Output clamp voltage

● Four distinct function modes

● Low power consumption

● 500mA Typical current-limiting capability