| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 20 Pin |
| Supply Voltage (DC) | 2.00 V to 6.00 V |
| Case/Package | SOIC |
| Number of Outputs | 8 Output |
| Output Current | 7.80 mA |
| Number of Circuits | 8 Circuit |
| Number of Bits | 8 Bit |
| Propagation Delay Max (tpd) | 37.0 ns |
| Polarity | Inverting |
| Voltage Nodes | 6.00 V, 5.00 V, 2.00 V |
| Output Current Drive | -1.00 mA |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tube |
The SN74HC563DW is an octal transparent D Latch with 3-state outputs. It is designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. While the LE input is high, the Q\ outputs follow the complements of the data (D) inputs. When LE is taken low, the outputs are latched at the inverses of the levels set up at the D inputs. A buffered OE\ input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased high logic level provide the capability to drive bus lines without interface or pull-up components.
● High-current 3-state outputs drive bus lines directly or up to 15 LSTTL loads
● 80µA Maximum low power consumption
● Typical tpd = 21ns
● ±6mA Output drive at 5V
● 1µA Maximum low input current
● Bus-structured pinout
● Green product and no Sb/Br
Part Datasheet PDF Search
72,405,303 Parts Datasheet PDF, Update more than 5,000 PDF files ervery day.
