| TYPE | DESCRIPTION |
|---|
| Mounting Style | Through Hole |
| Number of Pins | 14 Pin |
| Supply Voltage (DC) | 2.00 V to 5.50 V |
| Case/Package | DIP |
| Number of Outputs | 4 Output |
| Number of Circuits | 4 Circuit |
| Number of Bits | 4 Bit |
| Propagation Delay Max (tpd) | 8.50 ns |
| Voltage Nodes | 5.00 V, 3.30 V |
| Output Current Drive | -1.00 mA |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tube |
The SN74AHC125N is a quadruple Bus Buffer Gate features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor and the minimum value of the resistor is determined by the current-sinking capability of the driver.
● Latch-up performance exceeds 250mA per JESD 17
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