| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 14 Pin |
| Supply Voltage (DC) | 2.00 V to 5.50 V |
| Case/Package | SOIC |
| Number of Outputs | 4 Output |
| Number of Circuits | 4 Circuit |
| Number of Bits | 4 Bit |
| Propagation Delay Max (tpd) | 8.50 ns |
| Voltage Nodes | 5.00 V, 3.30 V |
| Output Current Drive | -1.00 mA |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tape & Reel (TR) |
DESCRIPTION
●The ’AHC125 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output.
●Operating Range 2-V to 5.5-V VCC
●Latch-Up Performance Exceeds 250 mA Per JESD 17
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