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TMS320DM368ZCE Datasheet PDF - TI
Manufacturer: | TI |
Category: | Digital Signal Processors(DSPs) |
Case Package: | BGA338 |
Description: | DSP 16Bit/32Bit 432MHz 338Pin NFBGA |
Documentation: | TMS320DM368ZCE User Reference Manual Guide (208 Pages) |
Pictures: |
TMS320DM368ZCE Datasheet PDF
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TMS320DM368ZCE Specifications
TYPE | DESCRIPTION |
---|---|
Frequency | 432 MHz |
Number of Pins | 338 Pin |
Supply Voltage (DC) | 1.28 V (min) |
Case/Package | BGA338 |
RAM Memory Size | 32768 B |
Number of Bits | 32 Bit |
Number of UARTs | 2 UART |
Number of ADCs | 1 ADC |
TMS320DM368ZCE Size & Package
TYPE | DESCRIPTION |
---|---|
Product Lifecycle Status | Active |
TMS320DM368ZCE Environmental
TMS320DM368ZCE Function Overview
● Highlights
● High-Performance Digital Media System-on-Chip (DMSoC)
● 432-MHz ARM926EJ-S Clock Rate
● Two Video Image Co-processors (HDVICP, MJCP) Engines
● Supports a Range of Encode, Decode and Video Quality Operations
● Video Processing Subsystem
● HW Face Detect Engine
● Resize Engine from 1/16x to 8x
● 16-Bit Parallel AFE (Analog Front-End) Interface Up to 120 MHz
● 4:2:2 (8-/16-bit) Interface
● 8-/16-bit YCC and Up to 24-Bit RGB888 Digital Output
● 3 DACs for HD Analog Video Output
● Hardware On-Screen Display (OSD)
● Capable of 1080p 30fps H.264 video processing
● Peripherals include EMAC, USB 2.0 OTG, DDR2/NAND, 5 SPIs, 2 UARTs, 2 MMC/SD/SDIO, Key Scan
● 8 Different Boot Modes and Configurable Power-Saving Modes
● Pin-to-pin and software compatible with DM365
● Extended temperature (-40°C - 85°C) available
● 3.3-V and 1.8-V I/O, 1.35-V Core
● 338-Pin Ball Grid Array at 65nm Process Technology
● High-Performance Digital Media System-on-Chip (DMSoC)
● 432-MHz ARM926EJ-S Clock Rate
● 4:2:2 (8-/16-Bit) Interface
● Capable of 1080p 30fps H.264 video processing
● Pin compatible with DM365 processors
● Fully Software-Compatible With ARM9™
● Extended temperature available for 432-Mhz device
● ARM926EJ-S™ Core
● Support for 32-Bit and 16-Bit (Thumb® Mode) Instruction Sets
● DSP Instruction Extensions and Single Cycle MAC
● ARM® Javelle® Technology
● Embedded ICE-RT Logic for Real-Time Debug
● ARM9 Memory Architecture
● 16K-Byte Instruction Cache
● 8K-Byte Data Cache
● 32K-Byte RAM
● 16K-Byte ROM
● Little Endian
● Two Video Image Co-processors (HDVICP, MJCP) Engines
● Support a Range of Encode and Decode Operations
● H.264, MPEG4, MPEG2, MJPEG, JPEG, WMV9/VC1
● Video Processing Subsystem
● Front End Provides:
● HW Face Detect Engine
● Hardware IPIPE for Real-Time Image Processing
● Resize Engine
● Resize Images From 1/16x to 8x
● Separate Horizontal/Vertical Control
● Two Simultaneous Output Paths
● IPIPE Interface (IPIPEIF)
● Image Sensor Interface (ISIF) and CMOS Imager Interface
● 16-Bit Parallel AFE (Analog Front End) Interface Up to 120 MHz
● Glueless Interface to Common Video Decoders
● BT.601/BT.656/BT.1120 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
● Histogram Module
● Lens distortion correction module (LDC)
● Back End Provides:
● Hardware On-Screen Display (OSD)
● Composite NTSC/PAL video encoder output
● 8-/16-bit YCC and Up to 24-Bit RGB888 Digital Output
● 3 DACs for HD Analog Video Output
● LCD Controller
● BT.601/BT.656 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
● Analog-to-Digital Convertor (ADC)
● Power Management and Real Time Clock Subsystem (PRTCSS)
● Real Time Clock
● 16-Bit Host-Port Interface (HPI)
● 10/100 Mb/s Ethernet Media Access Controller (EMAC) - Digital Media
● IEEE 802.3 Compliant
● Supports Media Independent Interface (MII)
● Management Data I/O (MDIO) Module
● Key Scan
● Voice Codec
● External Memory Interfaces (EMIFs)
● DDR2 and mDDR SDRAM 16-bit wide EMIF With 256 MByte Address Space (1.8-V I/O)
● Asynchronous16-/8-bit Wide EMIF (AEMIF)
● Flash Memory Interfaces
● NAND (8-/16-bit Wide Data)
● 16 MB NOR Flash, SRAM
● OneNAND(16-bit Wide Data)
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