The Low density Ultralow power device feature an enhanced STM8 CPU core providing increased processing power while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low power operations. It includes an integrated debug module with a hardware interface (SWIM) which allows non-intrusive in-application debugging and ultrafast Flash programming. The microcontrollers feature embedded data EEPROM and low power low-voltage single-supply program Flash memory. The device incorporate an extensive range of enhanced I/Os and peripherals, a 12-bit ADC, two comparators, a real-time clock, two 16-bit timers, one 8-bit timer, as well as standard communication interfaces such as an SPI, an I2C interface, and one USART.
● Low power features
● Advanced STM8 core
● Reset and supply management
● Clock management
● Low power RTC
● Memories: Flash, EEPROM with ECC, RAM
● DMA
● 12-bit ADC up to 1 Msps/28 channels
● 2 ultralow power comparators
● Timers
● Communication interfaces
● Up to 41 I/Os, all mappable on interrupt vectors
● Up to 20 capacitive sensing channels
● Development support
● 96-bit unique ID