SN74LS191N Datasheet PDF - TI

The SN74LS191N is a 4-bit synchronous Up/Down Counter with up/down mode control. It has a complexity of 58 equivalent gates. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous counters. The outputs of the four master-slave flip-flops are triggered on a low-to-high transition of the clock input if the enable input is low. A high at the enable input inhibits counting. Level changes at the enable input should be made only when the clock input is high. The direction of the count is determined by the level of the down/up input. When low, the counter count up and when high, it counts down. A false clock may occur if the down/up input changes while the clock is low.

● Counts 8-4-2-1 BCD or binary

● Single down/up count control line

● Count enable control input

● Ripple clock output for cascading

● Asynchronously presettable with load control

● Parallel outputs

● Cascadable for N-bit applications