| TYPE | DESCRIPTION |
|---|
| Mounting Style | Through Hole |
| Frequency | 30.0 MHz |
| Number of Pins | 16 Pin |
| Digital Logic Level | TTL |
| Supply Voltage (DC) | 4.75 V to 5.25 V |
| Case/Package | DIP |
| Output Current | 8.00 mA |
| Supply Current | 100 µA |
| Number of Circuits | 2 Circuit |
| Number of Bits | 2 Bit |
| Propagation Delay Max (tpd) | 20.0 ns |
| Polarity | Non-Inverting, Inverting |
| Voltage Nodes | 5.00 V |
| Output Current Drive | -50.0 µA |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tube |
The SN74LS112AN is a dual J-K Negative-Edge-Triggered Flip-Flop with clear and preset. When preset and clear are inactive (high), data at the J and K inputs meeting the setup time requirements are transferred to the outputs on the negative-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the J and K inputs may be changed without affecting the levels at the outputs. This versatile flip-flop can perform as toggle flip-flop by tying J and K high. The SN74S112A is characterized for operation from 0 to 70°C.
● Fully buffered to offer maximum isolation from external disturbance
● Quality and reliability
● Green product and no Sb/Br
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin PDIP Tube Flip Flop JK-Type Neg-Edge 2Element 16Pin PDIP Tube
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOIC Tube
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOIC T/R
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOIC T/R
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOP T/R
TI
IC JK TYPE NEG TRG DUAL 16DIP
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOP Tube
TI
IC JK TYPE NEG TRG DUAL 16SOIC
Motorola
Dual JK negative edge-triggered flip-flop
TI
IC JK TYPE NEG TRG DUAL 16SO
Part Datasheet PDF Search
72,405,303 Parts Datasheet PDF, Update more than 5,000 PDF files ervery day.
