| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Frequency | 46.0 MHz |
| Number of Pins | 14 Pin |
| Digital Logic Level | CMOS |
| Supply Voltage (DC) | 4.50 V to 5.50 V |
| Case/Package | SOIC |
| Output Current | 4.00 mA |
| Number of Circuits | 2 Circuit |
| Number of Bits | 2 Bit |
| Propagation Delay Max (tpd) | 31.0 ns |
| Polarity | Non-Inverting, Inverting |
| Voltage Nodes | 5.00 V |
| Output Current Drive | -1.00 mA |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tube |
The SN74HCT74D is a dual positive-edge-triggered D-type Flip-flop with clear and preset. A low level at the preset (PRE\\) or clear (CLR\\) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the data (D) input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of clock. Following the hold-time interval, data at the D input may be changed without affecting the levels at the outputs.
● Outputs can drive up to 10 LSTTL loads
● Inputs are TTL-voltage compatible
● 40µA Maximum low power consumption
● 17ns Typical tpd
● ±4mA Output drive at 5V
● 1µA Maximum low input current
● Green product and no Sb/Br
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