| TYPE | DESCRIPTION |
|---|
| Number of Pins | 14 Pin |
| Supply Voltage (DC) | 2.00 V to 6.00 V |
| Case/Package | TSSOP |
| Number of Outputs | 4 Output |
| Number of Bits | 4 Bit |
| Propagation Delay Max (tpd) | 26.0 ns |
| Voltage Nodes | 6.00 V, 5.00 V, 2.00 V |
| Output Current Drive | -1.00 mA |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Cut Tape (CT) |
The SN74HC125PWR is a quadruple Bus Buffer Gate features independent line drivers with 3-state outputs. It is designed for 2 to 6V VCC operation. Each output is disabled when the associated output-enable (OE) input is high. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor and the minimum value of the resistor is determined by the current-sinking capability of the driver.
● High-current 3-state outputs interface directly with system bus or can drive up to 15 LSTTL loads
● 80µA maximum ICC low power consumption
● 11ns typical Propagation delay (tpd)
● ±6mA Output drive at 5V
● 1µA maximum Low input current
● Green product and no Sb/Br
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Buffer/Line Driver 4CH Non-Inverting 3-ST CMOS 14Pin TSSOP T/R
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Buffer/Line Driver 4CH Non-Inverting 3-ST CMOS 14Pin SSOP T/R
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Buffer/Line Driver 4CH Non-Inverting 3-ST CMOS 14Pin SOIC Tube
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Buffer/Line Driver 4CH Non-Inverting 3-ST CMOS 14Pin PDIP Tube
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Buffer/Line Driver 4CH Non-Inverting 3-ST CMOS 14Pin SOIC T/R
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Buffer/Line Driver 4CH Non-Inverting 3-ST CMOS 14Pin TSSOP T/R
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Buffer/Line Driver 4CH Non-Inverting 3-ST CMOS 14Pin SOIC T/R
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Buffer/Line Driver 4CH Non-Inverting 3-ST CMOS 14Pin TSSOP T/R
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