| TYPE | DESCRIPTION |
|---|
| Frequency | 110 MHz |
| Number of Pins | 20 Pin |
| Supply Voltage (DC) | 4.50 V to 5.50 V |
| Case/Package | SOIC |
| Number of Outputs | 8 Output |
| Output Current | 50.0 mA |
| Number of Bits | 8 Bit |
| Propagation Delay Max (tpd) | 12.0 ns |
| Voltage Nodes | 5.00 V |
| Output Current Drive | -1.00 mA |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tape & Reel (TR) |
The SN74ACT574DWR is an octal edge-triggered D-type Flip-flop with 3-state outputs. It is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. On the positive transition of the clock input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines in a bus-organized system without need for interface or pull-up components. OE\ does not affect internal operations of the flip-flop.
● 9ns at 5V Maximum tpd
● Inputs are TTL-voltage compatible
● Green product and no Sb/Br
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