TYPE | DESCRIPTION |
---|
Mounting Style | Surface Mount |
Frequency | 200 MHz |
Number of Pins | 20 Pin |
Supply Voltage (DC) | 4.50 V to 5.50 V |
Case/Package | SOIC |
Number of Outputs | 8 Output |
Output Current | 64.0 mA |
Number of Circuits | 8 Circuit |
Number of Bits | 8 Bit |
Propagation Delay Max (tpd) | 7.40 ns |
Polarity | Non-Inverting |
Voltage Nodes | 5.00 V |
Output Current Drive | -500 µA |
TYPE | DESCRIPTION |
---|
Product Lifecycle Status | Active |
Packaging | Tube |
The SN74ABT574ADW is an octal edge-triggered D-type Flip-flop with 3-state outputs. It is designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. On the positive transition of the clock input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered OE\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pull-up components. OE\ does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
● Ioff Supports partial-power-down mode operation
● Latch-up performance exceeds 500mA per JEDEC Standard JESD 17
● Green product and no Sb/Br
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