| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 8 Pin |
| Supply Voltage (DC) | 3.00 V (min) |
| Case/Package | SOIC |
| Supply Current | 16.0 mA |
| Data Rate | 400 Mbps |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tube |
The SN65LVDS34D is a dual LVDS Data Line Receiver offers the widest common-mode input voltage range in the industry. This receiver provides an input voltage range specification compatible with a 5V PECL signal as well as an overall increased ground-noise tolerance. Precise control of the differential input voltage thresholds allows for inclusion of 50mV of input voltage hysteresis to improve noise rejection on slowly changing input signals. The input thresholds are still no more than ±50mV over the full input common-mode voltage range. The high-speed switching of LVDS signals usually necessitates the use of a line impedance matching resistor at the receiving-end of the cable or transmission media. The SN65LVDT series of receiver eliminates this external resistor by integrating it with the receiver. The non-terminated SN65LVDS series is also available for multidrop or other termination circuits.
● Input remains high-impedance on power-down
● Active failsafe assures a high-level output with no input
● Integrated 110R line termination resistors on LVDT products
● Bus-pin ESD protection exceeds 15kV HBM
● TTL inputs are 5V tolerant
● Green product and no Sb/Br
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