description
●These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear (CLR) input.
●Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output.
●The SN54ALS273 is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C.
●• Contain Eight Flip-Flops With Single-Rail Outputs
●• Buffered Clock and Direct-Clear Inputs
●• Individual Data Input to Each Flip-Flop
●• Applications Include:
● Buffer/Storage Registers
● Shift Registers
● Pattern Generators
●• Package Options Include Plastic
● Small-Outline (DW) Packages, Ceramic
● Chip Carriers (FK), and Standard Plastic (N)
● and Ceramic (J) 300-mil DIPs
