PCA9515D Datasheet PDF - NXP

The PCA9515D is a BiCMOS I²C-Bus Repeater intended for application in I²C-bus and SMBus systems. While retaining all the operating modes and features of the I²C-bus system, it permits extension of the I²C-bus by buffering both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400pF. The I²C-bus capacitance limit of 400pF restricts the number of devices and bus length. The repeater enables the system designer to isolate two halves of a bus, thus more devices or longer length can be accommodated.

● 2-channel, bidirectional buffer

● Active high repeater enable input

● Open-drain input/outputs

● Lock-up free operation

● Supports arbitration and clock stretching across the repeater

● Powered-off high-impedance I²C pins

● Latch-up testing is done to JEDEC standard JESD78 which exceeds 100mA