Product Details
●The HMCAD1511 is a versatile high performance low power analog-to-digital converter (ADC), utilizing time-interleaving to increase sampling rate. Integrated Cross Point Switches activate the input selected by the user.
●In single channel mode, one of the four inputs can be selected as a valid input to the single ADC channel. In dual channel mode, any two of the four inputs can be selected to each ADC channel. In quad channel mode, any input can be assigned to any ADC channel.
●An internal, low jitter and programmable clock divider makes it possible to use a single clock source for all operational modes.
●The HMCAD1511 is based on a proprietary structure, and employs internal reference circuitry, a serial control interface and serial LVDS/RS DS output data. Data and frame synchronization clocks are supplied for data capture at the receiver. Internal 1 to 50X digital coarse gain with ENOB > 7.5 up to 16X gain, allows digital implementation of oscilloscope gain settings. Internal digital fine gain can be set separately for each ADC to calibrate for gain errors.
●Various modes and configuration settings can be applied to the ADC through the serial control interface (SPI). Each channel can be powered down independently and data format can be selected through this interface. A full chip idle mode can be set by a single external pin. Register settings determine the exact function of this pin.
●HMCAD1511 is designed to easily interface with Field Programmable Gate Arrays (FPGAs) from several vendors.
●Applications
● USB Powered Oscilloscopes
● Digital Oscilloscopes
● Satellite Receivers
●### Features and Benefits
● 8-bit High Speed Single/ Dual/ Quad ADC
●Single Channel Mode: FSmax = 1000 MSPS
●Dual Channel Mode: FSmax = 500 MSPS
●Quad Channel Mode: FSmax = 250 MSPS
● Integrated Cross Point Switches (Mux Array)
● 1X to 50X digital gain
●No missing codes up to 32X
● 1X gain: 49.8 dB SNR
●10X gain: 48.2 dB SNR
● Internal low jitter programmable Clock Divider
● Ultra Low Power Dissipation
●710 mW including I/O at 1000 MSPS
● 0.5 μs start-up time from Sleep, 15 μs from Power Down
● Internal reference circuitry with no external components required
● Coarse and fine gain control
● Digital fine gain adjustment for each ADC
● Internal offset correction
● 1.8 V supply voltage
● 1.7 - 3.6 V CMOS logic on control interface pins
● Serial LVDS/RS DS output
● 7x7 mm QFN 48 Pin (LP7D) Package
