| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Frequency | 30.0 MHz |
| Number of Pins | 16 Pin |
| Supply Voltage (DC) | 4.50 V (min) |
| Case/Package | SOIC |
| Output Current | 2.40 mA |
| Number of Gates | 2 Gate |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Not Listed by Manufacturer |
The HEF4027BT is a dual JK Flip-flop features independent set-direct (SD), clear-direct (CD), clock inputs and outputs (Q, Q\\). Data is accepted when clock is low and transferred to the output on the positive-going edge of the clock. The active high asynchronous clear-direct and set-direct inputs are independent and override the J, K and clock inputs. The outputs are buffered for best system performance. Schmitt trigger action makes the clock input highly tolerant of slower rise and fall times. It operates over a recommended VDD power supply range of 3 to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS or another input.
● Fully static operation
● Standardized symmetrical output characteristics
● Complies with JEDEC standard JESD 13-B
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