| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 84 Pin |
| Supply Voltage (DC) | 5.00 V |
| Case/Package | PLCC |
| Number of I/O Pins | 68 IO |
| TYPE | DESCRIPTION |
|---|
| Packaging | Tube |
Altera
66 Pages / 1.45 MByte
Altera
18 Pages / 0.47 MByte
Altera
1 Pages / 0.13 MByte
Altera
CPLD MAX 7000S Family 2.5K Gates 128 Macro Cells 76.9MHz 5V 100Pin TQFP
Altera
CPLD MAX 7000 Family 2.5K Gates 128 Macro Cells 62.5MHz CMOS Technology 5V 84Pin PLCC
Altera
CPLD MAX 7000S Family 2.5K Gates 128 Macro Cells 76.9MHz 5V 84Pin PLCC
Altera
CPLD MAX 7000S Family 2.5K Gates 128 Macro Cells 100MHz CMOS Technology 5V 84Pin PLCC
Altera
CPLD MAX 7000S Family 2.5K Gates 128 Macro Cells 76.9MHz CMOS Technology 5V 100Pin TQFP
Altera
CPLD MAX 7000S Family 2.5K Gates 128 Macro Cells 76.9MHz 5V 100Pin PQFP
Altera
CPLD MAX 7000A Family 2.5K Gates 128 Macro Cells 98MHz CMOS Technology 3.3V 100Pin TQFP
Altera
CPLD MAX 7000 Family 2.5K Gates 128 Macro Cells 76.9MHz 5V 84Pin PLCC
Altera
CPLD MAX 7000S Family 2.5K Gates 128 Macro Cells 100MHz CMOS Technology 5V 100Pin TQFP
Altera
CPLD MAX 7000S Family 2.5K Gates 128 Macro Cells 100MHz 5V 100Pin TQFP
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