| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Frequency | 304 MHz |
| Number of Pins | 256 Pin |
| Supply Voltage (DC) | 3.30 V |
| Case/Package | BGA-256 |
| Number of I/O Pins | 212 IO |
| TYPE | DESCRIPTION |
|---|
| Packaging | Tray |
Introduction
●The MAX®II family of instant-on, non-volatile CPLDs is based on a 0.18-µm, 6-layer-metal-flash process, with densities from 240 to 2,210 logic elements (LEs) (128 to 2,210 equivalent macrocells) and non-volatile storage of 8 Kbits. MAX II devices offer high I/O counts, fast performance, and reliable fitting versus other CPLD architectures. Featuring MultiVolt core, a user flash memory (UFM) block, and enhanced in-system programmability (ISP), MAX II devices are designed to reduce cost and power while providing programmable solutions for applications such as bus bridging, I/O expansion, power-on reset (POR) and sequencing control, and device configuration control.
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Altera
CPLD MAX II Family 980 Macro Cells 201.1MHz 0.18um Technology 2.5V/3.3V 256Pin Micro FBGA
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