C8051F350 Datasheet PDF - Silicon Labs

System Overview

●C8051F350/1/2/3 devices are fully integrated mixed-signal System-on-a-Chip MCUs. Highlighted features

●are listed below. Refer to Ta b l e 1.1for specific product feature selection.

●• High-speed pipelined 8051-compatible microcontroller core (up to 50 MIPS)

●• In-system, full-speed, non-intrusive debug interface (on-chip)

●• 24 or 16-bit single-ended/differential ADC with analog multiplexer

●• Two 8-bit Current Output DACs

●• Precision programmable 24.5 MHz internal oscillator

●• 8 kB of on-chip Flash memory

●• 768 bytes of on-chip RAM

●• SMBus/I2C, Enhanced UART, and SPI serial interfaces implemented in hardware

●• Four general-purpose 16-bit timers

●• Programmable counter/timer array (PCA) with three capture/compare modules and watchdog timer function

●• On-chip power-on reset, VDDmonitor, and temperature sensor

●• On-chip voltage comparator

●• 17 Port I/O (5 V tolerant)

●Analog Peripherals

●\- 24 or 16-Bit ADC

●  •No missing codes

●  • 0.0015% nonlinearity

●  • Programmable conversion rates up to 1 ksps

●  • 8-Input multiplexer

●  • 1x to 128x PGA

●  • Built-in temperature sensor

●\- Two 8-Bit Current Output DACs

●\- Comparator

●  • Programmable hysteresis and response time

●  • Configurable as interrupt or reset source

●  • Low current (0.4 µA)

●On-chip Debug

●\- On-chip debug circuitry facilitates full speed, non intrusive in-system debug (No emulator required)

●\- Provides breakpoints, single stepping, inspect/modify memory and registers

●\- Superior performance to emulation systems using ICE-Chips, target pods, and sockets

●\- Low Cost, CompleteDevelopment Kit

●Supply Voltage 2.7 to 3.6 V

●\- Typical operating current: 5.8 mA @ 25 MHz;

●                                    11 µA @ 32 kHz

●\- Typical stop mode current: 0.1 µA

●Temperature Range: –40 to +85 °C

●High Speed 8051 µC Core

●\- Pipelined Instruction architecture; executes 70% of instructions in 1 or 2 system clocks

●\- Up to 50 MIPS throughput

●\- Expanded interrupt handler

●Memory

●\- 768 Bytes (256 + 512) On-Chip RAM

●\- 8 kB Flash; In-system programmable in 512-byte Sectors

●Digital Peripherals

●\- 17 Port I/O; All 5 V tolerant with high sink current

●\- Enhanced UART, SMBus™, and SPI™ Serial Ports

●\- Four general purpose 16-bit counter/timers

●\- 16-bit programmable counter array (PCA) with three capture/compare modules

●\- Real time clock mode using PCA or timer and external clock source

●Clock Sources

●\- Internal Oscillator: 24.5 MHz with ± 2% accuracy supports UART operation

●\- External Oscillator: Crystal, RC, C, or clock (1 or 2 pin modes)

●\- Clock multiplier to achieve 50 MHz internal clock

●\- Can switch between clock sources on-the-fly

●28-Pin QFN or 32-Pin LQFP Package

●\- 5 x 5 mm PCB footprint with 28-QFN