| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 16 Pin |
| Supply Voltage (DC) | 2.00 V (min) |
| Case/Package | SOIC |
| Clock Speed | 71.0 MHz, 66.0 MHz (max) |
| Number of Gates | 2 Gate |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Not Listed by Manufacturer |
| Packaging | Tube |
The 74HC390D is a dual Decade Ripple Counter pin compatible with low power Schottky TTL (LSTTL). This dual 4-bit decade ripple counter divided into four separately clocked sections. The counter has two divide-by-2 sections and two divide-by-5 sections. These sections are normally used in a BCD decade or bi-quinary configuration, since they share a common master reset input (nMR). If the two master reset inputs (1MR and 2MR) are used to simultaneously clear all 8-bit of the counter, a number of counting configurations are possible within one package. Each section is triggered by the high-to-low transition of the clock inputs (nCP0\ and nCP1\\). For BCD decade operation, the nQ0 output is connected to the nCP1\ input of, the divide-by-5 section. For bi-quinary decade operation, the nQ3 output is connected to the nCP0\ input and nQ0 becomes the decade output.
● Two master reset inputs to clear each decade counter individually
● Standard output capability
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